Google Chip Packaging Mechanical and Thermal Engineer | Sunnyvale, CA, USA

Minimum qualifications:

·      Bachelor’s degree in Materials or Mechanical Engineering, or equivalent practical experience.

·      3 years of experience in CPI (Chip Package Interaction) and thermo-mechanical modeling of advanced packaging technologies.

·      Experience in ANSYS including Workbench.

·      Experience with mechanical and thermal properties on packaging materials (e.g., underfill, TIM, substrate, and lid attach adhesive).

Preferred qualifications:

·      Master’s degree in Materials or Mechanical Engineering with specialization in semiconductors.

·      5 years of experience in mechanical and thermal modeling for chip package design.

·      Experience in mechanical analysis for systems including heat-sink attach, high performance server CPU product package design, and data center infrastructure design (e.g. racks, trays, optical components, etc).

·      Experience in holistic chip, package, and system level thermal design.

·      Understand chip packaging reliability test condition, criteria, and defects.

·      Ability to work in a cross-functional team environment.

About the job

Our computational challenges are so big, complex and unique we can’t just purchase off-the-shelf hardware, we’ve got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google’s services. As a Hardware Engineer, you design and build the systems that are the heart of the world’s largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

As a Chip Packaging Mechanical and Thermal Engineer, you will work on advanced packaging solutions for our data center ASIC designs. You will be responsible for performing thermo-mechanical modeling to ensure our ASICs meet/exceed performance and reliability targets. You will be contributing to and providing guidance on package materials selection, thermal, and mechanical design to improve reliability and thermal performance of our ASIC products. You will play a critical role and work with cross functional teams on our data center systems thermal design and ASIC chip and board level co-design.

Responsibilities

·      Perform chip and packaging thermo-mechanical structure modeling of our custom ASIC designs from concept to product qualification.

·      Contribute to our ASIC package design and verify structural integrity by using analytical methods, finite element models/simulations, and other analysis tools.

·      Responsible for designing robust and reliable mechanical package architecture by imparting knowledge of material properties, structural dynamics, and component level-test methods.

·      Create Finite Element Analysis (FEA) models by research, experimentation, testing, and tear down of failed products.

·      Define and use package thermal test vehicles to validate package thermal performance and support the overall system thermal design requirements.